The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2007

Filed:

Jun. 09, 2005
Applicants:

Thomas P. Remmel, Mesa, AZ (US);

Sriram Kalpat, Austin, TX (US);

Melvy F. Miller, Tempe, AZ (US);

Peter Zurcher, Phoenix, AZ (US);

Inventors:

Thomas P. Remmel, Mesa, AZ (US);

Sriram Kalpat, Austin, TX (US);

Melvy F. Miller, Tempe, AZ (US);

Peter Zurcher, Phoenix, AZ (US);

Assignee:

Freescale Semiconductor, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of making a semiconductor device includes the steps of: providing a semiconductor substrate () having a patterned interconnect layer () formed thereon; depositing a first dielectric material () over the interconnect layer; depositing a first electrode material () over the first dielectric material; depositing a second dielectric material () over the first electrode material; depositing a second electrode material () over the second dielectric material; patterning the second electrode material to form a top electrode () of a first capacitor (); and patterning the first electrode material to form atop electrode () of a second capacitor (), to form an electrode () of the first capacitor, and to define a resistor ().


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