The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2007
Filed:
Oct. 05, 2005
Peter Kazarian, San Jose, CA (US);
Peter Kazarian, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Generating enable and data input signals for flip-flops used for implementing complex logic functions on a programmable logic device. The method includes ascertaining a behavioral logic equation that defines a logic function to be implemented on the programmable logic device, the logic function having one or more inputs and an output. A truth table is then derived from the behavioral logic equation. The truth table includes one or more minterms that collectively define all the possible states of the one or more inputs and the output of the logic function. Positive and negative cofactors of the logic function are defined from the minterms of the truth table. The defined positive and negative cofactors are used to ascertain an enable signal used to enable a flip-flop and logic circuitry to provide to a data input of the flip-flop. Together, the logic circuitry and the enable signal control the operation of the flip-flop to implement the logic function on the programmable logic device. In one embodiment, the aforementioned method is implemented in the programming software used for programming a PLD and maintained on a computer readable medium.