The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2007

Filed:

Jun. 16, 2005
Applicant:

Seok Kiu Lee, Kyeongki-do, KR;

Inventor:

Seok Kiu Lee, Kyeongki-do, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a flash memory device is disclosed wherein, electrode spacers are formed on sides of self-aligned floating gates having a negative slope. Thus, upon etching of a stack gate after an interlayer dielectric film and a control gate are formed, a stringer of a control gate, which is formed by the negative slope of the self-aligned floating gates, can be prevented. Furthermore, because an isotropic etch process is used to remove element isolation films between the floating gates, the element isolation films do not remain on the sides of the floating gates. It is thus possible to prevent loss of the coupling ratio. Accordingly, failure of devices can be reduced and decreasing the program speed can be prevented.


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