The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2007

Filed:

Feb. 15, 2005
Applicant:

Atsushi Yusa, Minato-ku, JP;

Inventor:

Atsushi Yusa, Minato-ku, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An error correction circuit includes a selected-bit reverse circuit, an ECC circuit, a checkbit generation circuit, an ECC data register, a bit-comparing circuit, and an address memory unit. The selected-bit reverse circuit includes memory data and check data from the memory unit. The ECC circuit corrects a one-bit error. The checkbit generation circuit generates checkbits. The ECC data register stores the corrected data and the checkdata. The bit-comparing circuit compares each bit between the output data A from the selected-bit reverse circuit and the output data A' from the ECC data register. The address memory unit stores an address corresponding to the memory data when the bit-comparing circuit detects a discrepancy among the data A and the data A′. The error data memory unit writes the discrepancy information at the bit-location. The data OR circuit generates the first signal.


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