The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2007

Filed:

Mar. 25, 2003
Applicants:

Ronald L. Mahany, Cedar Rapids, IA (US);

Thomas J. Schuster, Cedar Rapids, IA (US);

Michael K. Ellis, Waseca, MN (US);

Daniel E. Alt, Cedar Rapids, IA (US);

Inventors:

Ronald L. Mahany, Cedar Rapids, IA (US);

Thomas J. Schuster, Cedar Rapids, IA (US);

Michael K. Ellis, Waseca, MN (US);

Daniel E. Alt, Cedar Rapids, IA (US);

Assignee:

Intermec IP Corp., Everett, WA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
Abstract

In an exemplary embodiment, a multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. A direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. A multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. A multi-rate digital data filter receives the converted digital data and produces a filtered digital output. An output scaler receives the filtered digital output and produces a scaled and filtered digital output. Finally, an adder combines the scaled and filtered digital output with a center frequency input and produces the converted output.


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