The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2007
Filed:
Aug. 11, 2004
Applicant:
John Turner, Santa Cruz, CA (US);
Inventor:
John Turner, Santa Cruz, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
Abstract
A programmable logic device (PLD) includes a non-volatile configuration memory. The non-volatile configuration memory is adapted to configure programmable resources (such as programmable logic and programmable interconnect) within the PLD. The non-volatile configuration memory may constitute a variety of memory types, for example, flash memory, erasable programmable read-only memory (EPROM), electrically erasable read-only memory (EEPROM), anti-fuse, and the like.