The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2007
Filed:
Feb. 11, 2006
Mario M. Pelella, Mountain View, CA (US);
William George En, Milpitas, CA (US);
Eric Paton, Morgan Hill, CA (US);
Witold P. Maszara, Morgan Hill, CA (US);
Mario M. Pelella, Mountain View, CA (US);
William George En, Milpitas, CA (US);
Eric Paton, Morgan Hill, CA (US);
Witold P. Maszara, Morgan Hill, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An integrated circuit with a semiconductor substrate is provided. A gate dielectric is on the semiconductor substrate, and a gate is on the gate dielectric. A silicide layer is on the semiconductor substrate adjacent the gate and the gate dielectric. The silicide layer incorporates a substantially uniformly distributed and concentrated dopant therein. A shallow source/drain junction is beneath the salicide layer. An interlayer dielectric is above the semiconductor substrate, and contacts are in the interlayer dielectric to the salicide layer.