The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2007

Filed:

Sep. 11, 2002
Applicants:

Michael Richard Betker, Allentown, PA (US);

Bryan Schlieder, Bethlehem, PA (US);

Shaun Patrick Whalen, Wescosville, PA (US);

Jay Patrick Wilshire, Pennsburg, PA (US);

Inventors:

Michael Richard Betker, Allentown, PA (US);

Bryan Schlieder, Bethlehem, PA (US);

Shaun Patrick Whalen, Wescosville, PA (US);

Jay Patrick Wilshire, Pennsburg, PA (US);

Assignee:

Agere Systems Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 7/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques are disclosed for implementing software breakpoints in a processor system having at least one processor coupled to a main memory and associated with an instruction cache. A breakpoint code is inserted at a particular location in the instruction cache of at least a given one of the processors, and a control indicator associated with the particular location is set to a first state which allows the breakpoint code to be returned to the given processor from the instruction cache in response to a first fetch request directed to a corresponding address. Subsequently, the control indicator associated with the particular location is set to a second state which directs that a second fetch request to the corresponding address be serviced from the main memory. The control indicator state is then changed again after a determination has been made, from the control indicator having been set to the second state, that the second fetch request to the corresponding address will be serviced from the main memory.


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