The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7295938 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 13, 2007

Filed:

Mar. 30, 2006
Applicants:

Takafumi Nakashiba, Kyoto, JP;

Takahiro Ochi, Kyoto, JP;

Mitsuko Takada, Osaka, JP;

Inventors:

Takafumi Nakashiba, Kyoto, JP;

Takahiro Ochi, Kyoto, JP;

Mitsuko Takada, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01K 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a voltage drop analysis step S, the process calculates a temporal variation of a power source voltage supplied to each cell along a transmission path of a clock signal. In a delay variation rate ratio calculation step S, the process calculates a delay time variation of each cell according to the power source voltage variation. In a clock delay variation amount calculation step S, the process obtains the magnitude of jitter of the clock signal based on the delay time variation.


Find Patent Forward Citations

Nakashiba, Takafumi. (2007). Clock jitter calculation device, clock jitter calculation method, and clock jitter calculation program (U.S. Patent No. 7295938). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7295938

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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