The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2007

Filed:

Aug. 09, 2004
Applicants:

Katsuya Arai, Kyoto, JP;

Toshihiro Kogami, Kyoto, JP;

Hiroaki Yabu, Kyoto, JP;

Inventors:

Katsuya Arai, Kyoto, JP;

Toshihiro Kogami, Kyoto, JP;

Hiroaki Yabu, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An inventive semiconductor integrated circuit device includes: an external connection terminal; an electrostatic discharge protection circuit; an output circuit; an output prebuffer circuit; an input prebuffer circuit; an internal circuit; an inter-power supply electrostatic discharge protection circuit; and a substrate potential control circuit. The substrate potential control circuit includes a capacitor and a resistor. The inter-power supply electrostatic discharge protection circuit includes an NMIS transistor. When a positive surge is applied to the external connection terminal, the substrate potential of the NMIS transistor is also increased. Thus, the NMIS transistor is turned ON, and the positive electrical charge supplied to the external connection terminal is discharged toward a ground line.


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