The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2007
Filed:
Mar. 04, 2005
Hideaki Tanishima, Kasugai, JP;
Hideaki Tanishima, Kasugai, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A buffer circuit for reducing leakage current and for protecting circuits from electrostatic discharge ('ESD'). A power supply circuit of an input/output buffer includes a transistor circuit connected to a high-potential power supply, a transistor circuit connected to a low-potential power supply, and a protection circuit connected between the two transistor circuits. The on-resistance of the transistor circuit is small. The transistor circuit generates a reference voltage close to the voltage of the high-potential power supply. The gate and source of the transistor circuits are connected to each other. This significantly reduces leakage current flowing from the reference voltage to the low-potential power supply. The protection circuit has resistance that lowers voltage at a high voltage terminal of the second transistor and reduces current flowing to the second transistor when a great amount of current flows through the first transistor circuit due to the occurrence of ESD.