The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2007
Filed:
Jun. 07, 2005
Hiroyuki Imamura, Settsu, JP;
Nobuyuki Koutani, Neyagawa, JP;
Hiroyuki Imamura, Settsu, JP;
Nobuyuki Koutani, Neyagawa, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A method for manufacturing a semiconductor device that includes mounting a semiconductor chip on a circuit board having an insulating substrate, a plurality of wiring layers arranged on the insulating substrate, and bumps formed on the wiring layers respectively, in which the bump is provided across a longitudinal direction of a corresponding one of the wiring layers so as to extend over regions on both sides of the wiring layer and contact a surface of the insulating substrate, without a stepped portion formed on a surface of the bump, and a cross sectional shape of the bump taken in a width direction of the wiring layer is such that a central portion is higher than both side portions. The method also includes connecting electrode pads of the semiconductor chip to the bumps, thereby achieving connection between the electrode pads of the semiconductor chip and the wiring layers via the bumps.