The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2007
Filed:
Jul. 23, 2004
Jed H. Rankin, South Burlington, VT (US);
Andrew J. Watts, Essex, VT (US);
Jed H. Rankin, South Burlington, VT (US);
Andrew J. Watts, Essex, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method to correct critical dimension errors during a semiconductor manufacturing process. The method includes providing a first semiconductor device. The first semiconductor device is analyzed to determine at least one critical dimension error within the first semiconductor device. A dose of electron beam exposure to correct the at least one critical dimension error during a subsequent process to form a second semiconductor device, or during modification of the first semiconductor device is determined. The subsequent process comprises providing a semiconductor structure. The semiconductor structure comprises a photoresist layer on a semiconductor substrate. A plurality of features are formed in the photoresist layer. At least one feature of the plurality of features comprises the at least one critical dimension error. The at least one feature comprising the critical dimension error is corrected by exposing the at least one feature to an electron beam comprising the dose of electron beam exposure, resulting in reduction of the size, or shrinkage, of the at least one feature comprising a critical dimension error.