The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2007
Filed:
Dec. 02, 2005
Applicant:
Piyush Jamkhandi, Milpitas, CA (US);
Inventor:
Piyush Jamkhandi, Milpitas, CA (US);
Assignee:
Broadcom Corporation, Irvine, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A design methodology to debug synchronization of a signal crossing clock domains. A testable synchronization control logic utilizes a programmable register to set parameters to test signals traversing from one clock domain to another clock domain across a synchronization circuit. The register is programmed with a latency value that corresponds to a correct synchronization timing for the clock domain crossing. Other bit entries in the register provide setting of other debug parameters and indications of monitored results.