The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2007

Filed:

Nov. 15, 2005
Applicants:

Byoung Hwa Lee, Kyungki-do, KR;

Chang Hoon Shim, Kyungki-do, KR;

Kyong Nam Hwang, Kyungki-do, KR;

Dong Seok Park, Seoul, KR;

Sang Soo Park, Kyungki-do, KR;

Min Cheol Park, Kyungki-do, KR;

Inventors:

Byoung Hwa Lee, Kyungki-do, KR;

Chang Hoon Shim, Kyungki-do, KR;

Kyong Nam Hwang, Kyungki-do, KR;

Dong Seok Park, Seoul, KR;

Sang Soo Park, Kyungki-do, KR;

Min Cheol Park, Kyungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/228 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multi-layer chip capacitor includes a capacitor body; first and second internal electrodes alternately arranged therein and separated by dielectric layers, each of the internal electrodes having at least one opening formed at one or more sides thereof; first and second conductive vias passing through the openings and electrically connected to the first and second internal electrodes, respectively; first and second terminal electrodes of opposite polarities formed on one or more side faces of the capacitor body; and first and second lowermost electrode patterns being coplanar, each pattern including a via contact portion and a lead portion extending therefrom. The first and second lowermost electrode patterns are connected to the first and second terminal electrodes, respectively, through the respective lead portions of the lowermost patterns.


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