The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2007

Filed:

Jul. 17, 2006
Applicants:

Ke-horng Chen, Taipei County, TW;

Li-ren Huang, Taipei County, TW;

Hong-wei Huang, Taichung County, TW;

Sy-yen Kuo, Taipei, TW;

Inventors:

Ke-Horng Chen, Taipei County, TW;

Li-Ren Huang, Taipei County, TW;

Hong-Wei Huang, Taichung County, TW;

Sy-Yen Kuo, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/60 (2006.01);
U.S. Cl.
CPC ...
Abstract

A delay line, an analog-to-digital converting device and a load-sensing circuit using the same are provided. The delay line comprises a delay-control terminal, a reset terminal, and n delay cells DCELL(0<x≦n). The delay cells DCELL˜DCELLare connected in series to each other. Each of the delay cells DCELLis coupled to the delay-control terminal and the reset terminal for transmitting the first level stage by stage between the delay cells according to a delay time decided by the delay-control terminal in a sensing period. The outputs of all delay cells are reset to the second level when the sensing period is finished. The sensing period is decided by the signal from the reset terminal. Wherein, at least an output terminal t(0<y≦n) of a delay cell DCELLamong the delay cells DCELL˜DCELLused as output terminal of the delay line.


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