The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2007
Filed:
Apr. 24, 2003
William Elton Burky, Austin, TX (US);
Bjorn Peter Christensen, Austin, TX (US);
Dung Quoc Nguyen, Austin, TX (US);
David A. Schroter, Round Rock, TX (US);
Albert Thomas Williams, Austin, TX (US);
William Elton Burky, Austin, TX (US);
Bjorn Peter Christensen, Austin, TX (US);
Dung Quoc Nguyen, Austin, TX (US);
David A. Schroter, Round Rock, TX (US);
Albert Thomas Williams, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A circuit and method provide rename register reallocation for simultaneous multi-threaded (SMT) processors that redistributes rename (mapped) resources between one thread during single-threaded (ST) execution and multiple threads during multi-threaded execution. The processor receives an instruction specifying a transition from a single-threaded to a multi-threaded mode or vice-versa and halts execution of all threads executing on the processor. The internal control logic then signals the resources to reallocate the resources. Rename resources are reallocated by directing an action at the rename mapper. When switching from SMT to ST mode, the mapper is directed to drop entries for the dying thread, but on a switch from ST to SMT mode, 'dummy' instruction group dispatch indications are sent to the mapper that indicate use of all architected registers for each thread.