The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2007
Filed:
Jun. 30, 2004
Greg F. Grohoski, Bee Cave, TX (US);
Manish Shah, Austin, TX (US);
John D. Davis, Los Altos Hills, CA (US);
Ashley Saulsbury, Los Gatos, CA (US);
Cong Fu, San Jose, CA (US);
Venkatesh Iyengar, Santa Clara, CA (US);
Jenn-yuan Tsai, Cupertino, CA (US);
Jeff Gibson, Mountain View, CA (US);
Greg F. Grohoski, Bee Cave, TX (US);
Manish Shah, Austin, TX (US);
John D. Davis, Los Altos Hills, CA (US);
Ashley Saulsbury, Los Gatos, CA (US);
Cong Fu, San Jose, CA (US);
Venkatesh Iyengar, Santa Clara, CA (US);
Jenn-Yuan Tsai, Cupertino, CA (US);
Jeff Gibson, Mountain View, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
An apparatus and method for mapping memory addresses to reduce or avoid conflicting memory accesses in memory systems such as cache memories is described in connection with a multithreaded multiprocessor chip. A CMT processor reduces the probability of hot-spots in cache operations by hashing certain bits of a physical cache address to form a hashed cache address. By using exclusive OR functionality to hash the index bits, an efficient address transformation is achieved for indexing into an L2 cache memory.