The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2007
Filed:
May. 08, 2003
Gordon Bremer, Clearwater, FL (US);
William L. Betts, St. Petersburg, FL (US);
Edward A. Thoenes, St. Petersburg, FL (US);
Joseph Q. Chapman, Seminole, FL (US);
Gordon Bremer, Clearwater, FL (US);
William L. Betts, St. Petersburg, FL (US);
Edward A. Thoenes, St. Petersburg, FL (US);
Joseph Q. Chapman, Seminole, FL (US);
Summit Technology Systems, LP, Bala Cynwyd, PA (US);
Abstract
The preferred embodiments of the present invention generally provide improved communications over a subscriber loop that is loaded with at least one and potentially a plurality of load coils. The preferred embodiments of the present invention will work over loaded subscriber loops that also support a native POTS interface as well as over loaded subscriber loops that are not providing a native POTS interface. Furthermore, although the preferred embodiments of the present invention are intended to address the technical and business problems of service providers delivering digital subscriber line service over loaded loops, the preferred embodiments will also work over unloaded loops. Various duplexing strategies such as, but not limited to, time-division duplexing (TDD), adaptive time-division duplexing (ATDD), four-wire duplexing, and/or extended performance echo cancelled duplexing (EP ECD) provide improved performance on loaded loops that generally offer significant signal attenuation at frequencies above 4 KHz. In addition, such duplexing strategies can start and stop quickly enough to pass various POTS interface signaling generally without creating a significant adverse effect on DSL data communications.