The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2007
Filed:
Apr. 18, 2005
Richard E. Matick, Cortlandt Manor, NY (US);
Stanley E. Schuster, Granite Springs, NY (US);
Richard E. Matick, Cortlandt Manor, NY (US);
Stanley E. Schuster, Granite Springs, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A hierarchical DRAM array, DRAM macro and logic chip including the DRAM macro embedded in the logic. DRAM array columns are segmented with a small number (e.g., 2-64) of cells connected to a local bit line (LBL) in each segment. Each LBL drives a sense device that drives a global read bit line (GRBL). When a cell storing a high is selected, the cell drives the LBL high, which turns the sense device on to drive the GRBL low. Segments may be used individually (as a macro) or combined with other segments sharing a common GRBL.