The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2007
Filed:
Jan. 10, 2003
Craig A. Hornbuckle, Torrance, CA (US);
David A. Rowe, Torrance, CA (US);
Thomas W. Krawczyk, Jr., Redondo Beach, CA (US);
Samuel A. Steidl, Torrance, CA (US);
Inho Kim, Palo Alto, CA (US);
Craig A. Hornbuckle, Torrance, CA (US);
David A. Rowe, Torrance, CA (US);
Thomas W. Krawczyk, Jr., Redondo Beach, CA (US);
Samuel A. Steidl, Torrance, CA (US);
Inho Kim, Palo Alto, CA (US);
Sierra Monolithics, Inc., Redondo Beach, CA (US);
Abstract
An integrated circuit includes a serdes framer interface (SFI) circuit for receiving a first set of data channels and a reference channel, generating first logic levels for the first set of data channels, and realigning the first set of data channels relative to a reference channel. The integrated circuit further includes a multiplexing circuit for receiving a second set of data channels and for merging the second set of data channels into one or more data channels. The second set of data channels is generated based on the first set of data channels. A data rate of the one or more data channels is higher than a data rate of the second set of data channels.