The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2007

Filed:

Dec. 16, 2005
Applicants:

Yiu Cheong Ho, Fremont, CA (US);

Hideo Ohira, Kanagawa, JP;

Ignatius B. Tjandrasuwita, Atherton, CA (US);

Prahlad R. Venkatapuram, San Jose, CA (US);

Inventors:

Yiu Cheong Ho, Fremont, CA (US);

Hideo Ohira, Kanagawa, JP;

Ignatius B. Tjandrasuwita, Atherton, CA (US);

Prahlad R. Venkatapuram, San Jose, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 7/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

Described are methods and systems for variable length decoding. A first execution unit executes a first single instruction that optionally reverses the order of bits in an encoded bitstream. A second execution unit executes a second single instruction that extracts a specified number of bits from the bitstream produced by the first execution unit. A third execution unit executes a third single instruction that identifies a number of consecutive zero bit values at the head of the bitstream produced by the first execution unit. The outputs of the first, second and third execution units are used in a process that decodes the encoded bitstream.


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