The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Dec. 10, 2004
Wei Chen, Plano, TX (US);
Hugh T. Mair, Fairview, TX (US);
Uming Ko, Plano, TX (US);
David B. Scott, Plano, TX (US);
Wei Chen, Plano, TX (US);
Hugh T. Mair, Fairview, TX (US);
Uming Ko, Plano, TX (US);
David B. Scott, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
System and method for detecting transistor failure in large-scale integrated circuits by measuring IDDQ. A preferred embodiment comprises a switch structure for an integrated circuit made up of a plurality of main switches (such as main switch) selectively coupling a power sub-domain to a power source pin, a plurality of pi-switches (such as pi-switch) selectively coupling pairs of power sub-domains, and a plurality of IDDQ switches (such as IDDQ switch) selectively coupling the power sub-domains to a VIDDQ pin. The pi-switches can decouple the power sub-domains while the IDDQ switches can enable the measurement of the quiescent current in the power sub-domains. The use of pi-switches and IDDQ switches can permit the measurement of the quiescent current in the power sub-domains without requiring the use of isolation buffers and needed to powering on and off the integrated circuit between current measurements in the different power sub-domains.