The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2007

Filed:

Apr. 21, 2004
Applicants:

Deepak K. Pai, Burnsville, MN (US);

Ronald R. Denny, Minneapolis, MN (US);

Inventors:

Deepak K. Pai, Burnsville, MN (US);

Ronald R. Denny, Minneapolis, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is for laminated and interconnected multiple substrates forming a multilayer package or other circuit component. A solder bump may be situated on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates pressed together via the adhesive films are mechanically bonded. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.


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