The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Dec. 16, 2004
Stephen N. Kiel, Mission Viejo, CA (US);
Snehamay Sinha, Dallas, TX (US);
Gregory E. Howard, Dallas, TX (US);
Stephen N. Kiel, Mission Viejo, CA (US);
Snehamay Sinha, Dallas, TX (US);
Gregory E. Howard, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The teachings of the present invention provide a method for modeling an integrated circuit system including a microchip, an integrated circuit package, and a printed circuit board. The method includes generating a configuration file including parasitics regarding ball grid arrays and vias intended for use in design of the integrated circuit system. A netlist may be generated using the configuration file. In accordance with a particular embodiment of the present invention, the operation of the integrated circuit system may be simulated to determine anticipated operating characteristics of the integrated circuit system.