The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Jan. 28, 2005
Matthew D. Bomhoff, Tucson, AZ (US);
Brian J. Cagno, Tucson, AZ (US);
Robert A. Kubo, Tucson, AZ (US);
Gregg S. Lucas, Tucson, AZ (US);
Matthew D. Bomhoff, Tucson, AZ (US);
Brian J. Cagno, Tucson, AZ (US);
Robert A. Kubo, Tucson, AZ (US);
Gregg S. Lucas, Tucson, AZ (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A multiple-master Inter Integrated Circuit ('IC') bus system includes a first master device including a first processing device within a first power boundary and a second master device including a second processing device within a second power boundary connected through a single IC bus to one or more slave devices. The second master device utilizes a software algorithm or hardware component to detect or manage power up of the first power boundary. Additionally, the second master device includes a bus control algorithm that allows it, once initiated, to communicate with the connected slave device, to direct the first power boundary to activate or detect that the first power boundary has powered up, and to release the IC bus. Once the first processor has initialized, the first master device acquires control of the IC bus without arbitration or interference with the second master device.