Data access circuit of semiconductor memory device

Abstract

A data access circuit of a semiconductor memory device in which data is read and written via all multiple ports in the semiconductor memory device having a multi-port structure. The data access circuit device having a multi-port structure comprises a write controller, a plurality of ports to receive serial data to be written, a plurality of read/write data control units, a plurality of write buffer units, a read controller, an input/output sense amplifier, and a plurality of read buffer units. Test time for the semiconductor memory device can be shortened by doubling the number of ports even in low frequency equipment, thus improving the throughput, by allowing data to be simultaneously and divisionally accessed via all ports, instead of accessing the data via a specified port at a time.