The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Aug. 30, 2005
Kenta Kato, Seto, JP;
Kenta Kato, Seto, JP;
Spansion LLC, Sunnyvale, CA (US);
Abstract
During an erase operation, lower decoder groups() and() (i=1 to m) of erase-target sectors are connected, at their respective low voltage power supply terminals (VL), to a first negative voltage supply line (VM) via switches (B) (and, respectively) and a negative bias voltage is supplied to local word lines. The first negative voltage supply line (VM) is connected to a level shift circuit (), and is level-shifted to a voltage at a higher level relative to that of a second negative voltage (VMP) which is output from a negative voltage generator circuit () via a second negative voltage supply line (VMP). An upper decoder group () is connected, at its low voltage power supply terminal (VL), to the second negative voltage line (VMP) via a switch (A) (). All global word lines GWL() (i=0 to m) are biased to the second negative voltage (VMP) by an active signal (ACTB()) at high level supplied to the upper decoder group () and are biased to a lower voltage level relative to the first negative voltage (VM) as a bias voltage to the local word lines.