The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Mar. 03, 2005
Alvin Leng Sun Loke, Fort Collins, CO (US);
Tin Tin Wee, Fort Collins, CO (US);
Robert Keith Barnes, Fort Collins, CO (US);
Kari Lee Arave, Fort Collins, CO (US);
Thomas Edward Cynkar, Fort Collins, CO (US);
James Ruhl Pfiester, Fort Collins, CO (US);
Alvin Leng Sun Loke, Fort Collins, CO (US);
Tin Tin Wee, Fort Collins, CO (US);
Robert Keith Barnes, Fort Collins, CO (US);
Kari Lee Arave, Fort Collins, CO (US);
Thomas Edward Cynkar, Fort Collins, CO (US);
James Ruhl Pfiester, Fort Collins, CO (US);
Avago Technologies General IP Pte Ltd, Singapore, SG;
Abstract
A method and apparatus is presented for generating a reference voltage that biases a metal-oxide-semiconductor (MOS) transistor used as a varactor in capacitive tuning applications. In one embodiment, a biasing circuit is implemented. The biasing circuit comprises a diode-clamped FET and an element coupled to the diode-clamped FET at a connection point. The element produces a constant current through the diode-clamped FET. A voltage is produced at the connection point. The voltage is one gate overdrive plus a threshold voltage above ground or one gate overdrive plus a threshold voltage below VDD. Establishing a threshold voltage in this way enables the biasing circuit to track an ideal voltage of a varactor that is coupled to the biasing circuit through the threshold voltage.