The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Dec. 23, 2004
Robert J. Kaszynski, Mendota Heights, MN (US);
Robert J. Kaszynski, Mendota Heights, MN (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method, apparatus and program storage device for modeling an analog PLL for use in a digital simulator are disclosed. A model of a phase locked loop to be simulated in a digital simulator includes a behavioral model for simulating a phase locked loop as a set of behavioral blocks based upon a high level description language and a loop filter model, used by the behavioral model, the loop filter model being implemented as a series of integrators based on a transfer function for creating a loop voltage for generating phase adjustments. The PLL behavior is based on actual circuit parameters and produces accurate behavior in a fraction of the time required using an analog simulator.