The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Sep. 27, 2005
Hayden C. Cranford, Jr., Cary, NC (US);
Stacy J. Garvin, Durham, NC (US);
Vernon R. Norman, Cary, NC (US);
Samuel T. Ray, Morgan Hill, CA (US);
Wayne A. Utter, Fuquay-Varina, NC (US);
Hayden C. Cranford, Jr., Cary, NC (US);
Stacy J. Garvin, Durham, NC (US);
Vernon R. Norman, Cary, NC (US);
Samuel T. Ray, Morgan Hill, CA (US);
Wayne A. Utter, Fuquay-Varina, NC (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A differential clock signal gating method and system is provided, wherein a clock buffer circuit control path develops a clock gating signal with a timing relationship to a clock signal. The clock gating signal gates a buffer on the clock buffer circuit controlled path in communication with the clock signal responsive to a first clock signal pulse negative half. The buffer provides second and successive clock signal pulses occurring immediately and sequentially after the first clock signal pulse as a buffer clock signal output to a second buffer stage in a second stage clock path, each having the nominal clock amplitude and the nominal clock pulse width of the clock signal without jitter.