The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
May. 27, 2004
Matthew Levi Severson, Oceanside, CA (US);
Chih-tung Chen, San Diego, CA (US);
Geoffrey Shippee, La Jolla, CA (US);
Sorin Dobre, San Diego, CA (US);
Matthew Levi Severson, Oceanside, CA (US);
Chih-tung Chen, San Diego, CA (US);
Geoffrey Shippee, La Jolla, CA (US);
Sorin Dobre, San Diego, CA (US);
Qualcomm Incoporated, San Diego, unknown;
Abstract
In general, this disclosure is directed to circuitry for implementation of headswitches and footswitches in an ASIC for power management. The disclosed circuitry supports not only effective power management, but also efficient use of ASIC area, reduced complexity, and the use of electronic design automation (EDA) tools. In this manner, the disclosed circuitry can support enhanced performance and simplified ASIC design. In some cases, headswitch or footswitch circuitry may be implemented as a switch pad ring that extends around a hard macro forming part of an ASIC core. In other cases, headswitch or footswitch circuitry can be distributed within an ASIC core by embedding distributed headswitch or footswitch components under metal layer power routing coupled to standard cell rows.