The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Nov. 22, 2005
Takashi Miida, Kanagawa, JP;
Takashi Miida, Kanagawa, JP;
Innotech Corporation, Yokohama-shi, JP;
Abstract
A semiconductor memory has plural cell transistors that are arranged in a matrix. The cell transistor comprises a P type silicon substrate, a control gate CG and a pair of electrically isolated floating gates. Plural projections are formed in the silicon substrate, and a pair of N type diffusion regions as the source and the drain is formed in both sides of the projection. The control gate extending in the row direction faces the projection and the floating gate FG, FGvia an insulation layer. The width Wof the floating gate FG, FGin the column direction is larger than the width Wof the control gate CG, so the floating gate FG, FGand the control gate CG can be manufactured without the self-align process.