The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2007
Filed:
Jul. 30, 2003
Takashige Baba, Kodaira, JP;
Tatsuya Saito, Kunitachi, JP;
Masayoshi Yagyu, Hanno, JP;
Shigeo Oomae, Hadano, JP;
Takashige Baba, Kodaira, JP;
Tatsuya Saito, Kunitachi, JP;
Masayoshi Yagyu, Hanno, JP;
Shigeo Oomae, Hadano, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A signal communication apparatus of a clock reproduction system in which clock signals are extracted from each of parallel data signals for redigitizing each of the data signals. The apparatus includes a reference clock signal generating circuit which is comprised of a clock extraction circuit for extracting a clock signal from each of a plurality of bits of received data signals, and a clock signal selection circuit for selecting one of the extracted clock signals. Alternatively, the reference clock signal generating circuit may be comprised of a data signal selection circuit for selecting one of a plurality of received data signals, and a clock extraction circuit for extracting a clock signal from the selected bit. Based on the resultant reference clock signal, clock signals are obtained that are phase-adjusted for redigitizing each bit of the received data signals. The selection made in the selection circuit is switched on the basis of the output of a clock signal monitoring circuit that detects the occurrence of abnormalities in the frequency of the extracted clock signal. Thus, the extraction of clock can be continued using other bits in the event of an abnormality in the bit from which the clock is being extracted.