The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2007

Filed:

Mar. 10, 2006
Applicant:

Yasuhiro Tomita, Osaka, JP;

Inventor:

Yasuhiro Tomita, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To increase a cell current ratio of a program state to an erase state of two bit storage nonvolatile memory cells and reduce power consumption, a program state of MONOS-typed memory cells is a state where electrons are injected into two local regions near drain and source junction edges, an erase state is a state where the electrons injected into the two local regions are neutralized or holes are injected, and a read bias is a linear region. A cell current in the program state can be suppressed since charges injected into the source side suppress introduction of electron carriers required for formation of a conductive channel and charges injected into the drain side limit the formation of the conductive channel near the drain side. Accordingly, a read current can be reduced, a cell current ratio can be enhanced, and moreover, a margin of a reading operation can be increased.


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