The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2007

Filed:

Dec. 21, 2005
Applicant:

Yukisato Miyazaki, Kasugai, JP;

Inventor:

Yukisato Miyazaki, Kasugai, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock generation circuit and a clock generation method are provided, which are spread spectrum clock generation and accurate phase control of a reference clock signal and an output clock signal. An input divider unitdivides an input clock signal CLKR by 50 to output a divided input clock signal CLKS. A DLL circuitoperates to obtain delay control signals DCS, DCS. A modulation circuitmodulates, in response to the delay control signals DCS, DCSand a modulation signal MOD output from a modulation control circuit, the divided input clock signal CLKS to output a modulation clock signal CLKN. A phase comparatordetects the phase difference between the modulation clock signal CLKN and a divided inner clock signal CLKM. A clock generation unitgenerates an output clock signal CLKO having frequency corresponding to a phase difference signal from the phase comparator


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