The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2007

Filed:

Aug. 26, 2004
Applicants:

Alfonso Martinez, Amsterdam, NL;

Massimo Rovini, Pisa, IT;

Inventors:

Alfonso Martinez, Amsterdam, NL;

Massimo Rovini, Pisa, IT;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/03 (2006.01);
U.S. Cl.
CPC ...
Abstract

Iterative decoder comprising a plurality of servers which perform the iterative decoding of a data block each, an input buffer memory and a control unit which performs a statistical multiplexing of the data at input, which are firstly stored in the input buffer memory and successively processed by one of the servers. The input buffer memory comprises N+L memory locations, where N is the number of servers and L is the number of so-called additional locations. Each block to be decoded which is received while all the servers are busy is stored in one of the L additional locations possibly available, or it is lost if the input buffer memory is entirely filled. The number L of additional locations and the number N of servers are such that the probability Pof a block being lost, calculated on the basis of a queuing model of D/G/N/N+L type, satisfies the condition P≦α·FER*, where FER* is the error rate in the blocks allowed and α<1; typically α is of the order of 0.01. Process for manufacturing such an iterative decoder comprising a step of design and a step of hardware embodiment.


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