The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2007

Filed:

Sep. 28, 2004
Applicants:

Yohko Naruse, Ichinomiya, JP;

Naoteru Matsubara, Gifu, JP;

Kazunori Fujita, Gifu, JP;

Inventors:

Yohko Naruse, Ichinomiya, JP;

Naoteru Matsubara, Gifu, JP;

Kazunori Fujita, Gifu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor apparatus is constructed such that the top surface, contacting a barrier metal film, of a conducting film embedded in a trench is located below the top surface of a second interlayer insulating film. The semiconductor apparatus is fabricated such that a plasma treatment is performed in a non-nitriding environment after a polishing process using CMP, so as to form a damaged layer on top of the second interlayer insulating film and the conducting film, and a portion of the damaged layer is removed by etching.


Find Patent Forward Citations

Naruse, Yohko. (2007). Semiconductor apparatus and method of fabricating the same (U.S. Patent No. 7273810). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7273810

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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