The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2007

Filed:

Jan. 20, 2004
Applicants:

Tsutomu Yamada, Hitachi, JP;

Tetsuaki Nakamikawa, Hitachi, JP;

Hiromichi Endoh, Hitachi, JP;

Noritaka Matsumoto, Hitachi, JP;

Hirokazu Kasashima, Hitachi, JP;

Inventors:

Tsutomu Yamada, Hitachi, JP;

Tetsuaki Nakamikawa, Hitachi, JP;

Hiromichi Endoh, Hitachi, JP;

Noritaka Matsumoto, Hitachi, JP;

Hirokazu Kasashima, Hitachi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/42 (2006.01); H02J 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Without being restrained to a specific bus scheme, kinds of I/O modules connected to a processing module can be discriminated. Module exclusive selection parts respectively provided in I/O modules connected in a stacked form to a processing module via connectors judge only a module select signal input from terminals in the same position on processing module side connectors to be active. Based thereon, identification information of its own I/O module is output to a predetermined terminal on the connector. Without being restrained to a specific bus scheme, therefore, the processing module can acquire identification information of the I/O modules from a predetermined terminal on a connector. One I/O module can be selected by a simple module selection circuit scheme of inputting module select signals successively output from the processing module to terminals in the same position on processing module side connectors according to the connection order of the I/O modules.


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