Phase shifter, phase shifting method and skew compensation system for high-speed parallel signaling

Abstract

The invention intends to realize a high accuracy of some picoseconds in skew compensation as well as a downsized circuit scale. A phase shifter using analog circuits that allows a downsized circuit scale and a high-accuracy phase shifting is adopted in order to finely shift the phase between a clock signal and a data signal. The phase shifter passes the clock signal or the data signal through a low pass filter having a pass band not higher than the based frequency of the clock signal to extract the frequency factors not higher than the based frequency factors. After dividing the extracted signal into plural signals, the phase shifter inputs the clock signal or the data signal having the phase shifted to plural variable gain amplifiers. Next, the phase shifter inputs the outputs from the variable gain amplifiers to an adder or a subtracter, and inputs the signal after being added or subtracted to a limit amplifier to reshape it into a rectangular wave. Thus, by analogically adjusting the outputs from the variable gain amplifiers, the phase shifter shifts the phase of the input clock signal or data signal.