The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2007
Filed:
Apr. 28, 2004
Seiichi Moriyama, Nagaokakyo, JP;
Naoto Osaka, Kusatsu, JP;
Takashi Koizumi, Kusatsu, JP;
Hiroyuki Kageyama, Takatsuki, JP;
Hiroyuki Morinaga, Osaka, JP;
Noriko Kaku, Kyoto, JP;
Yumiko Kataoka, Joyo, JP;
Seiichi Moriyama, Nagaokakyo, JP;
Naoto Osaka, Kusatsu, JP;
Takashi Koizumi, Kusatsu, JP;
Hiroyuki Kageyama, Takatsuki, JP;
Hiroyuki Morinaga, Osaka, JP;
Noriko Kaku, Kyoto, JP;
Yumiko Kataoka, Joyo, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
When a contention is detected between a memory write address and a display read address in a memory circuit which stores display data, a host retry pulse generating circuit generates a display read signal and a display line data transfer signal based on a memory write clock, and supplies these to the memory circuit while supplying the display line data transfer signal to a line latch circuit. Alternatively, upon detection of the contention above, a same line re-display read processing circuit performs same line re-display read processing without moving to the next line, and supplies a display read signal and a display line data transfer signal to the memory circuit while supplying the display line data transfer signal to the line latch circuit.