The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2007

Filed:

Dec. 03, 2003
Applicants:

Matthew L. Heston, Plano, TX (US);

James T. Theodoras, Ii, Plano, TX (US);

Inventors:

Matthew L. Heston, Plano, TX (US);

James T. Theodoras, II, Plano, TX (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B23P 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system provides a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane. A first circuit board having a first plurality of through-holes is aligned with a second circuit board having a second plurality of through-holes so that the first plurality of through-holes is matched with the second plurality of through-holes. An interconnection height of zero is provided between the first circuit board and the second circuit board. At least one pass-through socket, which includes pass-through socket through-holes, is aligned with the combination of the first circuit board and second circuit board. One or more pins disposed on a pin header are inserted through the pass-through socket, the first circuit board, and the second circuit board.


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