The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2007

Filed:

Nov. 15, 2004
Applicant:

Raminda Udaya Madurawe, Sunnyvale, CA (US);

Inventor:

Raminda Udaya Madurawe, Sunnyvale, CA (US);

Assignee:

Viciciv Technology, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
Abstract

A three-dimensional semiconductor device, comprising: a programmable logic circuit constructed in a first module layer, said logic circuit input to output responses configurable to a user specification by configuring a plurality of control signals, each control signal received at a regulatory node in the logic circuit; and a configuration circuit constructed in a second module layer, said configuration circuit further comprising: a plurality of memory elements, each memory element having either one or two outputs, each memory element capable of storing one of two binary data values, each output coupled to one of said control signals, each control signal having either the same polarity of the stored memory bit or the opposite polarity of the stored memory bit; and a memory programming method to access each of said memory elements to alter the stored data value between said two binary data values to configure the control signals; wherein, the second module layer is positioned substantially above the first module layer in the semiconductor device.


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