The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2007

Filed:

Nov. 16, 2004
Applicants:

Katsuhiro Ishida, Yokkaichi, JP;

Hiroshi Sugiura, Yokkaichi, JP;

Makoto Hasegawa, Yokkaichi, JP;

Katsuya Ito, Yokkaichi, JP;

Inventors:

Katsuhiro Ishida, Yokkaichi, JP;

Hiroshi Sugiura, Yokkaichi, JP;

Makoto Hasegawa, Yokkaichi, JP;

Katsuya Ito, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device includes forming a lower wiring layer on a semiconductor substrate, forming an interlayer insulating film on the lower wiring layer, layer, forming a plurality of. contact plugs in the interlayer insulating film so that the contact plugs are brought into electrical contact with the lower wiring layer, thereby forming an interlayer wiring layer, forming an upper wiring, layer on the interlayer wiring layer so that the upper wiring layer is brought into electrical contact with the contact plugs, and patterning the upper wiring layer so that the upper wiring layer corresponds to the contact plugs. In the patterning, after the upper wiring layer has been etched, the exposed interlayer insulating film and the exposed contact plugs are etched.


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