The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2007

Filed:

Dec. 16, 2003
Applicants:

Isamu Ishimura, Kyoto, JP;

Shinobu Machida, Kyoto, JP;

Inventors:

Isamu Ishimura, Kyoto, JP;

Shinobu Machida, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a system in which a CPU contained LSI and an external CPU share a bus, when the external CPU accesses a device to be controlled which is connected to a bus, the access to a device mounted on the common bus is not prevented in the CPU contained LSI. A CPU contained LSI includes a CPUa, common address/data busesandconnected to the CPUa, CPUb address/data busesandconnected to a CPUb, and a bus adjusting circuitdisposed between the common address/data buses and the CPUb address/data buses to exclusively control accesses from the CPUa and the CPUb to a device connected to the common address/data buses and connect the CPUb adress/data buses to the common address/data buses only when the CPUb is permitted to access the device connected to the common address/data buses.


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