The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2007

Filed:

Jun. 04, 2004
Applicants:

Emi Hayashi, Kyoto, JP;

Kiyoto Ohta, Osaka, JP;

Yuji Yamasaki, Osaka, JP;

Inventors:

Emi Hayashi, Kyoto, JP;

Kiyoto Ohta, Osaka, JP;

Yuji Yamasaki, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device is provided with a plurality of memory blocks including a plurality of word lines and a plurality of bit line pairs intersecting the individual word lines, a plurality of memory cells provided at each of intersections where the individual word lines intersect the bit line pairs, and a plurality of sense amplifiers respectively provided in correspondence with the bit line pairs. The semiconductor memory device further comprises common data bus line pairs each connected via switch transistors to the corresponding memory blocks, a read/write amplifier for performing a data read/write operation through the common data bus line pairs on the memory blocks, and an SRAM cell electrically connected via switch transistors to each common data bus line pair.


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