The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 2007
Filed:
May. 19, 2005
Applicant:
Jonathon Stiff, Beaverton, OR (US);
Inventor:
Jonathon Stiff, Beaverton, OR (US);
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); G01R 23/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A phase locked loop (PLL) can include a test loop filter () that generates a control voltage (V) for input to a voltage controlled oscillator (VCO). In a test mode, a control voltage can be varied and resulting output frequencies recorded, from which an open loop bandwidth can be determined. A control voltage can be varied by enabling a switch element (-) that can provide a current path through load resistance (RL) of test loop filter (). Current provided to the test loop filter can be varied according to test signals to provide a variable control voltage (V).