The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7265600 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 04, 2007

Filed:

Oct. 04, 2005
Applicants:

David W. Boerstler, Round Rock, TX (US);

Eskinder Hailu, Austin, TX (US);

Kazuhiko Miki, Round Rock, TX (US);

Jieming Qi, Austin, TX (US);

Inventors:

David W. Boerstler, Round Rock, TX (US);

Eskinder Hailu, Austin, TX (US);

Kazuhiko Miki, Round Rock, TX (US);

Jieming Qi, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides for a system comprising a first stable voltage module configured to receive a first power supply from a first power supply domain and to generate a first stable voltage in response to the received first power supply. A second stable voltage module is configured to receive a second power supply from a second power supply domain and to generate a second stable voltage in response to the received second power supply. A first set of resistors is coupled to the first stable voltage module and configured in parallel. A second set of resistors is coupled to the second stable voltage module and configured in parallel. A set of capacitors is coupled in parallel to the first set of resistors and the second set of resistors and a plurality of level shifters are coupled to the second set of resistors.


Find Patent Forward Citations

Boerstler, David. (2007). Level shifter system and method to minimize duty cycle error due to voltage differences across power domains (U.S. Patent No. 7265600). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7265600

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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