The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 2007
Filed:
Aug. 31, 2005
Young Sir Chung, Chandler, AZ (US);
Robert W. Baird, Gilbert, AZ (US);
Mark A. Durlam, Chandler, AZ (US);
Gregory W. Grynkewich, Gilbert, AZ (US);
Eric J. Salter, Scottsdale, AZ (US);
Young Sir Chung, Chandler, AZ (US);
Robert W. Baird, Gilbert, AZ (US);
Mark A. Durlam, Chandler, AZ (US);
Gregory W. Grynkewich, Gilbert, AZ (US);
Eric J. Salter, Scottsdale, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An integrated circuit device () comprises a substrate () and MRAM architecture () formed on the substrate (). The MRAM architecture () includes a MRAM circuit () formed on the substrate (); and a MRAM cell () coupled to and formed above the MRAM circuit (). Additionally a passive device () is formed in conjunction with the MRAM cell (). The passive device () can be one or more resistors and one or more capacitor. The concurrent fabrication of the MRAM architecture () and the passive device () facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate (), resulting in three-dimensional integration.