The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7264842 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 04, 2007

Filed:

Jul. 09, 2004
Applicants:

Yasuyuki Watanabe, Tokyo, JP;

Kazuya Ishiwata, Kanagawa, JP;

Shinsaku Kubo, Kanagawa, JP;

Inventors:

Yasuyuki Watanabe, Tokyo, JP;

Kazuya Ishiwata, Kanagawa, JP;

Shinsaku Kubo, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B05D 5/12 (2006.01); B05D 3/02 (2006.01); B05D 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A manufacturing method for a wiring substrate for a display panel having a plurality of wiring electrodes thereon includes the step of forming wirings in an orthogonal projection area of an image forming member onto the wiring substrate by photolithography using a photo paste. In addition, wires are formed in an area where the frame member is disposed by pattern printing using paste ink for printing.


Find Patent Forward Citations

Watanabe, Yasuyuki. (2007). Method of manufacturing a wiring substrate for a display panel (U.S. Patent No. 7264842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7264842

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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